Tensilica Flow for Diamond Standard Processor Cores Employs Synopsys SoC Design and Verification Platforms
MOUNTAIN VIEW, Calif. & SANTA CLARA, Calif.—(BUSINESS WIRE)—Feb. 21, 2006—
Synopsys, Inc. (Nasdaq:SNPS), a world leader in
semiconductor design software, and Tensilica(R), Inc. today announced
the availability of a predictable RTL-to-GDSII design flow for
Tensilica's new Diamond Standard processor family based on Synopsys'
Galaxy(TM) Design and Discovery(TM) Verification Platforms. The
Diamond Standard processor family includes six cores, ranging from a
low-power 32-bit controller to a high performance DSP. The combination
of Synopsys solutions with Tensilica's processors and design
methodology enables improved time-to-market for complex system-on-chip
(SoC) designs.
"This Tensilica design methodology, based on the widely used
Synopsys design implementation and verification tools, allows
designers to quickly integrate the Diamond Standard cores into their
SoCs while meeting all process technology requirements. This helps
deliver high-quality devices to market sooner," said Lonn Fiance,
director of Strategic Alliances at Synopsys. "The Diamond Standard
core family spans a range of power and performance points, making it
appropriate for numerous SoC applications."
The Diamond Standard processor reference design flow for Synopsys
includes the following products: Design Compiler(R) RTL synthesis,
Power Compiler(TM) power optimization, DFT Compiler test synthesis,
Physical Compiler(R) physical synthesis, Astro(TM) place-and-route,
PrimeTime(R) timing analysis, and VCS(R) RTL verification solution.
The reference flow can be used to design chips that can be
manufactured at all major semiconductor foundries.
"Our Diamond Standard core family and Synopsys' IC design and
verification solutions, deliver proven solutions to our mutual
customers," stated Larry Przywara, Tensilica's director of strategic
alliances. "The design methodology makes integrating our new cores
into existing and new designs both fast and predictable, because all
of the key design steps are addressed."
Availability
The reference flow for the Diamond Standard core family is
available from Tensilica today.
About Synopsys
Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic
design automation (EDA) software for semiconductor design. The company
delivers technology-leading semiconductor design and verification
platforms and IC manufacturing software products to the global
electronics market, enabling the development and production of complex
systems-on-chips (SoCs). Synopsys also provides intellectual property
and design services to simplify the design process and accelerate
time-to-market for its customers. Synopsys is headquartered in
Mountain View, California and has offices in more than 60 locations
throughout North America, Europe, Japan and Asia. Visit Synopsys
online at www.synopsys.com.
About Tensilica
Tensilica was founded in July 1997 to address the growing need for
optimized, application-specific microprocessor and DSP solutions in
high-volume embedded applications. Using a patented configurable and
extensible processor generation technology, Tensilica is the only
company that offers a wide range of controller, CPU and specialty DSP
processors in both off-the-shelf format via the Diamond Standard
series cores, and with full designer-configurability with the Xtensa
processor family. Every Tensilica processor core comes complete with a
companion software development tool environment, portfolio of system
simulation models, and hardware implementation tool support. For more
information on Tensilica's patented approach to the creation of
application-specific building blocks for SOC design, visit
www.tensilica.com.
Editors' Notes:
-- Tensilica and Xtensa are registered trademarks belonging to
Tensilica, Inc. Synopsys, the Synopsys logo, Design Compiler,
DesignWare, Formality, HSPICE, NanoSim, Physical Compiler,
PrimeTime, and VCS are registered trademarks of Synopsys, Inc.
Astro, JupiterXT, Power Compiler, Star-RCXT, Discovery and
Galaxy are trademarks of Synopsys. All other company and
product names are trademarks and/or registered trademarks of
their respective owners.
-- Tensilica's announced licensees include ALPS, AMCC (JNI
Corporation), Astute Networks, Atheros, ATI, Avago
Technologies, Avision, Bay Microsystems, Berkeley Wireless
Research Center, Broadcom, Cisco Systems, Conexant Systems,
Cypress, Crimson Microsystems, ETRI, FUJIFILM Microdevices,
Fujitsu Ltd., Hudson Soft, Hughes Network Systems, Ikanos
Communications, LG Electronics, Marvell, NEC Laboratories
America, NEC Corporation, NetEffect, Neterion, Nippon
Telephone and Telegraph (NTT), NVIDIA, Olympus Corporation,
sci-worx, Seiko Epson, Solid State Systems, Sony,
STMicroelectronics, Stretch, TranSwitch Corporation, u-Nav
Microelectronics and Victor Company of Japan (JVC).
Contact:
Tensilica
Paula Jones, 408-327-7343
Email Contact
or
Tanis Communications
Erika Powelson, 831-424-1811
Email Contact
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